1. Field of the Invention
The present invention relates generally to semiconductor design, and more specifically to a MOS layout with reduced coupling between the terminals of the MOS device.
2. Discussion of the Related Art
Metal-oxide semiconductor field effect transistors (MOSFETs) are used as discrete devices and as active elements in digital and analog integrated circuits (ICs) for a variety of applications ranging from microprocessors and memory to communications devices. A block diagram representation of a cross-sectional view of a conventional MOS structure is illustrated in FIG. 1. The semiconductor portion of the MOS structure 100 includes a drain region 102, a channel region (bulk) 104, and a source region 106. MOSFETs can be either n-channel or p-channel devices. In an n-channel MOSFET, the substrate 101 is a p-type semiconductor (e.g., silicon) and the drain region 102 and the source region 106 are n+ doped regions. MOSFET 100 also includes a gate 108 disposed above the channel region 104. In conventional MOSFETs, the gate 108 is separated from the channel region 104 by an insulating layer (e.g., silicon dioxide). As a voltage is applied to the gate 108, the conductive properties of the channel region 104 below the gate 108 change to form a channel in the channel region 104 through which electrons (in an n-type device) or holes (in a p-type device) may flow between the source region 106 and the drain region 102.
Metallization layers are typically formed above the semiconductor portion of the MOS structure to establish electrical connection between the regions of the MOS device. Electrical contacts are also formed to provide electrical access to the device terminals. For example, electrical access to the source region 106 is provided via a source contact 110 that connects a first metallization layer 112, a second metallization layer 114, and a third metallization layer 116. Similarly, access to the drain region 102 is provided via a drain contact 120 that connects a first metallization layer 122, a second metallization layer 124, and third metallization layer 126.
The placement of source contacts 110 and drain contacts 120 in MOSFET 100 is more clearly illustrated in FIG. 2 which shows a top-view of the MOS device 100. As shown in FIG. 2, MOSFET 100 may include multiple source contacts 110 arranged along the source region 106, and multiple drain contacts 120 arranged along the drain region 102. The relative proximity of the metal contacts to the gate 108 and to each other results in coupling between the regions of the MOS device, as represented by the capacitances illustrated in FIGS. 1 and 2. For example, the proximity of the source contact 110 and the drain contact 120 to the gate 108 establishes a respective source contact-gate capacitance 130 and a drain contact-gate capacitance 132.
The proximity of the different metallization layers to the regions of the MOSFET 100 results in additional coupling. For example, a first metallization layer (M1) 112 above the source region 106 couples the gate 108 to the source region 106 (the coupling is represented by gate-source parasitic capacitance 134). Similarly, the first metallization layer (M1) 122 above the drain region 102 couples the gate 108 to the drain region 102 (as represented by the drain-gate parasitic capacitance 136). The M1 layers 112 and 122 additionally couple the drain region 102 to the source region 106 via mutual coupling represented by the drain-source capacitance 140.
Each of the higher metallization layers (e.g., M2 and M3) further couples the drain region 102 to the source region 106. The amount of mutual coupling is related to the spatial distribution of the electrical contacts in the MOS device 100, as shown by drain-source capacitance 142 between M2 layers 114 and 124, and drain-source capacitance 144 between M3 layers 116 and 126. Each of these higher metallization layers also establishes a weak parasitic coupling between their respective drain/source region and the gate 108. However, this parasitic coupling becomes significantly weaker at further distances (i.e., the further the metallization layer is from the gate 108, the weaker the parasitic coupling will be). The source-drain mutual coupling between the M3 metallization layers is also illustrated in the top-view of FIG. 2 as drain-source mutual capacitances 144.